Data communications systems involve terminal installations as well as interconnecting networks that enable exchange of data from one point to another along a data transmission link. The link comprises a number of interconnected terminals forming a system network. The data links forming the network involve large numbers of balanced and un-balanced data transmission conductors that are usually provided as multi-paired cables that extend among data communication equipment and provide the transmission medium for electronic signals that pass between data terminating devices.
Various types of transmission protocols, called interfaces, in data transmission links have become standardized. Typical standards, depending upon bit transmission rate, are EIA-RS-232C, EIA-RS449 and CCITT type V.35. Each of these types of interfaces contains unique mechanical as well as electrical design parameters. In each, data signals are transmitted via conductors in cables through special interface connectors. The data signals comprise data, timing (clock) signals and control signals according to specific values.
To troubleshoot data transmission problems in industrial data transmission systems, wherein data are communicated between at least one central processing unit (CPU) and a multiplicity of data facilities, such as modems, line drivers and multiplexers, access to signals on each of the conductors within the interface must be monitored. Typically, a standard bit error rate transmitter (BERT) is applied to inject a known binary pattern to one portion of the interface and another BERT receives the data at another point of the interface. The two BERTs are synchronized to inject and respond to the same binary pattern, and an analysis is made to identify bit error rate. For example, to inject the binary data stream at one end of the interface, the CPU is disconnected and replaced by the BERT. Elsewhere along the interface, at a position that depends upon the particular portion of the interface and facilities to be tested, the interface must be opened and a standard breakout box inserted having exposed conductors corresponding to the interface conductors. The second BERT is connected in circuit with the interface through the breakout box.
The provision of two separate BERTs in the facility and incorporation of the breakout box into the interface creates substantial difficulties in testing Synchronization of the two BERTs requires an in depth knowledge of the clocking arrangement of the interface, and the two BERT sets must be conditioned to match the facilities. In some systems with loop clock, the task is almost impossible without using a breakout box to configure and provide these special clock arrangements. Substantial knowledge of the system and considerable time are therefore required.